The information age has brought the world smart phones, lightning-fast computers, and the internet over the past 60 years. The ability to pack more transistors onto a computer chip every 2 years has made this possible. This means that billions of transistors can fit on a fingernail-sized device. Individual atoms can be counted and observed within these “atomic scale” lengths.
Limits physical
This doubling has reached its physical limit. The U.S. Department of Energy’s Princeton Plasma Physics Laboratory (PPPL), joined industry efforts to extend the process and discover new techniques to produce ever more powerful, efficient, and affordable chips. Laboratory scientists correctly predicted a fundamental phase of atomic-scale chip production using modeling in the first PPPL research. This was done under a Cooperative Research and Development Agreement.
David Graves, associate lab director for low-temperature plasma surfaces interactions and professor at Princeton Department of Chemical and Biological Engineering, said that this would only be one piece of the entire process. He is also co-author of a paper in the Journal of Vacuum science & Technology B. He said that modeling can provide insight into many things and this Lab effort has some promise.
He said that while shrinkage cannot continue for much longer, it has not ended completely. Although the industry has used primarily empirical methods to create innovative new processes, it is still able to be successful. A deeper understanding of fundamental issues will help speed up this process. He said that fundamental studies are time-consuming and require industry expertise. This creates an incentive for laboratories to accept the work.
The PPPL scientists modeled “atomic layer etching (ALE), a critical fabrication step that removes single atomic layers from a surface. This can be used to create complex three-dimensional structures that are thousands of feet thinner than human hairs into a silicon wafer film.
Basic agreement
Joseph Vella, a postdoctoral fellow at PPPL who was the lead author of the journal article, stated that simulations generally agreed with experiments. This could lead to a better understanding of the use ALE for atomic scale etching. PPPL will be able to study the extent of surface damage as well as the degree of roughness that was created during ALE. This all begins with a fundamental understanding of atomic-layer etching.
The model simulates the sequential use of argon plasma and chlorine gas ions to control silicon etch on an atomic level. Plasma, also known as ionized gases, is a mixture of neutral molecules, positively charged and free electrons. Plasma used for semiconductor device processing is close to room temperature, unlike the plasma that is used in fusion experiments.
Graves stated that Lam Research’s surprise empirical finding was that the ALE process performed particularly well when the ion energies were higher than those we began with. “So, that will be our next step on the simulations — we’ll see if it’s possible to understand why the ion energies are so high and what causes them.”
He said that the semiconductor industry is planning a major expansion of the materials and types of the devices it uses. This expansion will require atomic-scale precision processing. He stated that the U.S. goal was to be the leader in using science to solve important industrial problems. “Our work is part of that.”